伦敦大学学院UCL招收电子工程EE全奖博士

山姆大叔

Two PhD positions available at the Department of Electronic and Electrical Engineering of University College London (UCL)



PhD position 1: Energy-neutral wireless sensor networks

Future deployments of wireless sensor network (WSN) infrastructures are expected to be equipped with energy harvesters (e.g.
piezoelectric, thermal or photovoltaic) to substantially increase their autonomy and lifetime. However, it is also widely recognized that the existing gap between the sensors’ energy harvesting (EH) availability and the sensors’ energy consumption requirements is not likely to close in the near future due to limitations in current EH technology, together with the surge in demand for more data-intensive applications. Hence, perpetually operating WSNs are currently impossible to realize for data-intensive applications. As a result, significant (and costly) human intervention is required to replace batteries, which substantially hinders the applicability of WSNs. With the continuous improvement of energy efficiency representing a major drive in WSN research, the major objective of this project is to develop transformative mechanisms for coordination of the wireless medium access, which can be used in conjunction with current or upcoming EH capabilities, in order to enable the deployment of energy neutral WSNs with practical network lifetime and data gathering rates that are substantially higher than the current state-of-the-art. This research will leverage several centralised and distributed protocols that are compliant with the physical layer of IEEE802.15.4 in order to determine the optimal transmission schedule from the sensor nodes to base stations or collection units that guarantee: i) energy neutrality and (ii) a certain target quality measure for the application of interest. This will be possible using techniques ensuring stochastic convergence to low-energy, collision-free, multichannel transmission schemes for WSNs that build upon our recent work [1][2]. In this PhD topic, the convergence techniques will be extended by taking into account the new features: i) unequal transmission intervals and variable data rates corresponding to the data collected by each sensor node; and ii) the battery capacity of each sensor node (and possibly non-ideal phenomena including the leakage characteristics of the energy storage unit). MATLAB will be used for all simulations. The Contiki OS will also be used for all protocols’ tests with real wireless sensors.



[1] D. Buranapanichkit and Y. Andreopoulos, "Distributed time-frequency division multiple access protocol for wireless sensor networks," IEEE Wireless Communications Letters, vol. 1, no. 5, pp.
440-443, Oct. 2012.
http://www.ee.ucl.ac.uk/~iandreo ... TFDMA_published.pdf

[2] H. Besbes, G. Smart, D. Buranapanichkit, C. Kloukinas and Y.
Andreopoulos, “”, IEEE Trans. Wireless Communications, vol. 12, no.
10, pp. 4916-4931, Oct. 2013.
http://www.ee.ucl.ac.uk/~iandreop/TWC.pdf





PhD position 2: Fault-tolerant design of signal processing and linear algebra systems

It is widely recognised that shrinking device dimensions in CMOS technology scaling have led to significant challenges with respect to energy consumption (the so-called “power-wall” of silicon CMOS or “dark silicon” problem [Esmaeilzadeh, et al ISCA’11]). Even though power can be reduced by lowering the supply voltage, this leads to increased soft error rates due to transient faults caused by process variations. In the past, such transient faults have been dealt with transparently at the hardware layer with frequency guardbands and error control coding (ECC). However, frequency guardbands limit supply voltage reductions and ECC circuits lead to substantial overhead in digital logic and power. Thus, the “business as usual” approach to CMOS scaling is becoming prohibitively expensive in terms of energy, processing throughput and chip reliability.

Despite these foreseen limitations in technology scaling, the amount of useful data streams to be processed for scientific, commercial, surveillance, medical, and end-user purposes continues to grow exponentially. By some calculations, the worldwide data stream processing volume per year will be increased by three orders of magnitude within 10 years [Int. Workshop on Data Intensive Distrib.
Comput., 2012]. On the high performance computing (HPC) side, the processing of all these enormous volumes of data requires increasingly complex multimedia stream processing algorithms, such as low-level feature analysis, trends analysis, object recognition, multimedia indexing and retrieval, 3D graphics, etc. For instance, superimposing simple graphics in 3D broadcasts of sports events requires about 5 teraflops [Postley, IEEE Spectrum, 2012], compared to about 5 gigaflops for conventional 2D broadcasts. At the other end of the computing spectrum, multimedia stream processing algorithms are now becoming the dominant energy bottlenecks in mobile devices. For example, up to 50-fold increase of energy consumption is observed in
systems- on-chip under gaming and video streaming [W. East (CEO of ARM), 2012 UCL Mildner Lecture].

Given the predicted CMOS technology scaling limitations and the enormous processing demands from applications, we argue that system designers must utilise systematic approaches to trade off precision for hardware scaling and robustness to soft errors [3][4]. That is, instead of solely striving for increases of fault-free integration densities and operating frequencies at substantial cost and complexity, we must redesign software stack -- numerical stream processing kernels, compiler, and runtime -- in ways that will withstand the expected soft error rates while guaranteeing sufficient precision for the end-user applications. In this PhD topic, these avenues will be explored further for real-world applications based on signal processing and linear algebra kernels.



[3] Y. Andreopoulos, "Error-tolerant multimedia stream processing:
There's plenty of room at the top (of the system stack),"IEEE Trans.
on Multimedia, vol. 15, no. 2, pp. 291-303, Feb. 2013.
http://www.ee.ucl.ac.uk/~iandreo ... fRoom_published.pdf

[4] D. Anastasia and Y. Andreopoulos, "Throughput-distortion computation of generic matrix multiplication: toward a computation channel for digital signal processing systems," IEEE Trans. on Signal Processing, vol. 60, no. 4, pp. 2024-2037, Apr. 2012.

http://www.ee.ucl.ac.uk/~iandreo ... _GEMM_published.pdf



Eligibility for both positions: Chinese students that are eligible to apply for the CSC scholarship (or already have obtained it) are eligible to apply. UCL will waive the fees for successful applicants.

The successful applicants are expected to

(i) have recently graduated (or expected to complete by Oct. 2014) with a First Class degree from an MSc programme in Computer Science or Electrical Engineering of a highly-ranked University

(ii) have strong mathematical and programming background (C/C++ or similar and Matlab)

(iii) have demonstrated some research potential via publications in conferences or journals (optional).

University description: UCL is among the world's top universities, as reflected in a range of rankings and tables. The Department of Electronic and Electrical Engineering at UCL has more than a century of tradition of internationally leading research, from Ambrose Fleming, the inventor of the thermionic valve, to Professor Charles Kao, PhD alumnus of the Department and 2009 Nobel prize in Physics recipient for his research on communication with optical fibres that begun at UCL. The department has 40 members of academic staff and approximately 50 research fellows and 120 Doctoral students. Academics in the Department are involved in many activities including providing advice to governments, consulting for multinational companies, organising conferences and running large-scale research projects funded by industry, UK Research Councils and the European Commission.
Each year the Department produces on average around 300 Publications and 5 filed Patents.

http://www.ucl.ac.uk/     http://www.ee.ucl.ac.uk/

Supervisor description: Dr. Yiannis Andreopoulos has published 35 articles in archival journals on multimedia stream processing and communications systems (25 in IEEE journals) and is currently Senior Lecturer at UCL. He has received two best–paper awards and his work has been cited approximately 1500 times, H-index: 19 (Google Scholar).
His work on scalable video coding (SVC) was ranked amongst the best-performing solutions in the MPEG Call-for-Evidence in SVC and his team’s open-source software on error-resilient video streaming has attracted more than 5000 downloads from Sourceforge (e.g. the UNV and UNVedu projects) and other project websites. He has performed related consultancies for Intel IT Research (Folsom, CA) the Tate Museum and the BAFTA in London and is co-inventor of two patents on video processing systems and one patent application on fault-tolerant stream processing. He is Associate Editor of: the Elsevier Image and Vision Computing journal, the IEEE Trans. on Multimedia (where he led the organisation of one of the first special issues on error-tolerant system design) and the IEEE Signal Processing Letters. He is Technical Programme Committee (TPC) member of several top-tier conferences on multimedia signal processing systems. He has been PI or Co-I in projects related to resource-efficient signal processing sponsored by:
EPSRC, EU framework programmes, as well as Recognised Researcher in a US NSF project.

http://www.ee.ucl.ac.uk/~iandreop/

Contact for sending a CV and for informal inquiries (please mention it is related to this advertisement and the CSC scholarship):

Dr. Yiannis Andreopoulos, i.andreopoulos@ucl.ac.uk

农妇三泉

very good 好内容。。。